High-end automotive infotainment systems that integrate data communications, local services, and video entertainment require high-performance programmable processing technology support, and integrating FPGA coprocessors into mainstream automotive ICT architectures is the ideal solution. This paper presents the requirements for automotive entertainment systems, discusses the mainstream system architecture, and describes how to integrate FPGA coprocessors into hardware and software architectures to meet high-performance processing requirements, flexibility requirements, and cost reduction goals.
Entertainment electronics is becoming a major aspect of the differentiation between luxury cars, driving the rapid development of its performance and functionality. How to compromise performance, cost and flexibility requirements is a challenge for design engineers. High-end applications include satellite radio, rear seat entertainment, navigation, various types of audio playback, speech synthesis and recognition, and other new applications.
The core technology used in automotive entertainment systems is fundamentally different from traditional automotive applications. Unlike other areas of automotive electronics, these entertainment applications are used every day, and demand is constantly changing. In addition, outdated entertainment systems will be a major obstacle to new car sales and will affect car resale prices and rental prices.
Technical requirements for in-car entertainment systemsTraditional automotive electronics are driven by a comprehensive standardization with long product life, a wider temperature range, and lower cost requirements, and in-vehicle entertainment systems basically meet these requirements. Design engineers need to design long-lived systems and adapt to the rapid development of system functions. These requirements require a high degree of flexibility and performance that is not available with traditional Application Specific Standard Product (ASSP) based system architectures.
The basic architecture of the in-vehicle entertainment system now designed to support flat panel displays, dynamic maps and car information can be displayed through a graphical human interface. These architectures are surrounded by highly standardized microcontrollers, various standard interfaces, and simple hardware accelerators that support low-end graphics processing. This architecture can meet the mid-level entertainment system requirements of the automotive market at very low cost, and can be extended to high-end applications to meet the requirements of the top luxury automotive market. Video image processing and communication are typical top-level application examples. The various standards that support these applications include MPEG2, MPEG4, and H.26 for video? As well as communications GSM/EDGE, WCDMA, 1XEVDO, satellite radio, satellite TV, digital video broadcasting, and WiFi, these standards rely on a growing array of signal processing algorithms that require exceptionally high programmable processing performance.
There are currently three semiconductor technologies available to implement these highly complex algorithms: programmable digital signal processors (DSPs), ASSPs, and field programmable gate arrays (FPGAs). DSP is a high-performance programmable processor designed for signal processing. The DSP processor has high flexibility, low power consumption, and high cost performance. However, it has no hardware acceleration function and cannot provide advanced image processing and wireless communication algorithms. The computing power required; typically an ASSP with a DSP processor can provide an optimized solution for simple video or communication standards, but cannot be programmed to accommodate different standards; FPGAs are not only highly processing but also programmable. Therefore, it can meet a variety of applications and standards. Unlike the other two technologies, the flexibility and performance of the FPGA meets the requirements of all potential algorithms.
FPGA coprocessor applicationThe information communication infrastructure mentioned above requires additional processing chips to handle high-end applications, typically ASICs and ASSPs, which are integrated with the processor through a memory or video processing bus to become application-specific coprocessors. It is a very good idea to replace this specific application hardware with an FPGA. The application that integrates the FPGA and the processor is called FPGA coprocessing. This use of FPGAs can download new application-specific accelerators to the FPGA as required to assist in any high-performance application. This concept is widely used in advanced military multi-standard radios, commonly referred to as software-defined radio (SDR) technology. With SDR technology, a single radio can automatically adapt to different radio standards with simple push buttons, which not only helps the device adapt to future applications, but also reduces the number of custom processors that are idle when performing different tasks. This software radio technology can also be used for in-vehicle communication and video applications.
The flexibility of FPGAs in video processing and wireless connectivity also saves on equipment costs and increases the value of the system. The current basic architecture requires an ASSP to support each new video codec or wireless standard. Replacing multiple ASSPs with one FPGA can reduce the number of times that must be configured and maintained during the life of the vehicle. Extending the basic architecture of in-vehicle entertainment systems to include FPGAs provides a programmable single high-end platform that covers a wider range of video and wireless standards and performance. This method is also suitable for use in advanced automotive entertainment system architectures.
Delphi Delco Electronic Systems has released an example of an advanced automotive entertainment system architecture. The platform uses a standard SH-4 microprocessor and a Hitachi HD6?404 "Amanda" ASIC device to provide the basic functionality required by the 80% mid-size automotive market. The system provides a general-purpose control processor with a standard API layer that abstracts hardware peripherals and coprocessors. The ASIC provides basic peripheral functions and an integrated graphics processor that supports interactive graphics and extended functions, but does not provide video codecs or other DSP functions. The system provides the basic functionality required for all entertainment devices, but still requires an additional ASIC or ASSP for video codec and wireless communication.
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